1. Field of the Invention
The present invention relates to apparatus and method for computing a coupling noise voltage occurring in cells in a flash memory device.
2. Discussion of the Related Art
As the use of memory devices for portable devices, such as a digital camera, a digital music player, a personal digital assistant (PDA), an e-book, a smart phone and a tablet PC, increases, interest in a flash memory device including multi-level cells (e.g., floating gate MOS transistors), as a high-density flash memory device that is capable of storing plenty of data over a relatively small area increases.
Since multi-level cell is capable of storing data of 2 bits or more into a cell, the flash memory device including the multi-level cell has the advantage of remarkably reducing bit cost compared to a flash memory device including a single-level cell. A threshold voltage is set for each multi-level cell, and due to the threshold voltage, data of 2 bits or more can be stored in each multi-level cell.
However, there is a disadvantage that little margin is left for the threshold voltage. Accordingly, it is problematic that programming performance of the flash memory device including the multi-level is worse than that of the flash memory including the single-level cell and a coupling noise voltage occurs in each cell.